Modern integrated class D UMZCH combine seemingly incompatible: high efficiency and low THD. This article describes the basic principles of Class-D amplifiers and describes the line chips UMZCH American firm MPS (Monolithic Power Systems). Recently, the power amplifier circuitry (UMZCH) have developed two contradictory directions: Improvement in the subjective quality of sound reproduction, usually by reducing the efficiency (COP) of the amplifier; Increased efficiency of the amplifier and reduce its size while maintaining high quality performance. The first direction is characterized by using the output stages UMZCH powerful field-effect transistors and vacuum tubes (Hi-End), often working in class A. The second direction is characteristic of wearable and automotive audio equipment. It is in realization of this direction are widely used amplifiers class D, and high-quality sound reproduction apparatus stationary class D is most commonly used in amplifiers for the subwoofer. There are five major classes of modes of active elements (transistors or tubes). This class of operation modes A, B, AB, C and D. Recall their features.
Class A mode
of operationactive element (transistor or bulb) is open throughout the period of the signal. Class A power amplifiers introduce minimal distortion in the amplified signal to have a very low K11D. They are used in one-and two-stroke potaktpyh UMZCH for midrange and tweeters, which is especially important that the level of harmonic distortion was low. Class A amplifiers - the most expensive.
Class B operation mode
active element (transistor or tube) is only open one half cycle of the input signal. Class amplifiers have high efficiency.but THD them much higher. Commonly used in two-stroke UMZCH srsdnschastotnyh for speakers and speaker mid-bass.
Operation mode class AB
active element (transistor or bulb) and this mode is open one half-full and some of the other half-cycle of the input signal. Mode class AB - a cross between classes A and B. Class AB amplifiers have a higher efficiency. than Class A amplifiers, but contribute to the signal harmonic distortion less than Class B. This is the most common class of mass UMZCH.
Mode of operation of class C
Class C - is the work of transistors with a small amplitude of the voltage locking lower than the bias voltage. In this case, the amplitude of the audio signal is less than the bias voltage. In this state, the transistor conducts only the upper portion of the positive half, greatly distorts the signal. Therefore, audio amplifiers, this class is not applicable.This mode transistors has a high efficiency (about 85%).
Class D operation mode
in mode class D converts the input signal into rectangular pulses of equal amplitude, the duration of which is proportional to the value of the signal at any given time (eg, PWM - Pulse Width Modulation). Active elements of the output stage to operate at the same switching mode and have two states: a transistor or a locked or fully open. Class D amplifiers have a maximum efficiency, as main energy loss pas weekend powerful keys occur until the moment when in the open position and minimal energy loss will be less than the lower the resistance of the public key.Conventional Class D amplifiers have an efficiency of over 90% and large enough THD (about 10%), and application of new technologies (know-how of the producers) to reduce THD to fractions of a percent. This significantly expanded the scope of class D in modern UMZCH.
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| The concept is simple UMZCH Class D |
Basic principles of UMZCH Class D
concept is simple UMZCH Class D shown in bottom
It consists of a pulse width modulator (PWM) on the transistor Q1, a strong push-pull transistor switch Q2, Q3, and a lowpass filter (LPF) which filters out high frequency components of the pulse current through the loudspeaker. Divider na resistors R1 and R2 will set the offset voltage of Q1 and the symmetry of the whole scheme. R3 - load resistor transistor Ql. R4, C4 - thermostabilization emitter circuit of the transistor. C1 - filter capacitor voltage. C5, R5, L1. C6 - a lowpass filter (LPF). C7 - decoupling capacitor. The composition of Class D amplifier also includes a generator of a triangular or sawtooth. The frequency of this oscillator is usually in the range of 200 ... 600 kHz. Swipe "blade" of the generator and the gain stage to Q1 are chosen so that the output transistor switches Q2 and Q3 are alternately opened until when the voltage saturation "saw" through zero. Stress diagram explaining the operation of the scheme. beep input otsugstvuet pas. "Saw * is symmetric, and na emitters of transistors Q2 and Q3 form a symmetrical square wave, square wave. When submitting pa amplifier input signal LF "Saw" will shift up or down. Change points unlocking transistors and as a consequence, the duration of the output pulses and pauses between them. These parameters will vary according to the law of the input low-frequency (audio) signal. The resulting pulse signal with a variable duty cycle pulse-called imiulspym or PWM sigialom and process to obtain it - shirotpo-width modulation (PWM). PWM sigpal contains LF component. form modudiruyuschy repeating signal. If the PWM signal from the output transistor switches to pass through the LPF, then he will miss this component to the speaker and to suppress the high-frequency components of the PWM sigpala. Due to incomplete suppression of the HF-sostavlyayuschsy AC voltage on the speaker will be slightly indented, you can see enlarged fragment pas to the lower graph in . Irregularity decreases with increasing frequency PWM generator, improved quality of the LPF and the use of certain know-how, which carefully guard Manufacturers chip amplifiers class D.
Class D amplifiers using bipolar transistors are gone. The foundation of modern UMZCH Class D are powerful keys pas MOS transistors are characterized by high performance and low resistance channel open. When using such transistors in key mode achieves a high efficiency. Two practical schemes UMZCH Class D MOS transistors and operational amplifier are given in [1]. The real boom in the use mode class D UMZCH began with the appearance of such specialized chips as ZXCD1000 firm Zeiex | 2 |, and several others. These chips are called driver amplifiers class D. They contain a PWM generator with "Saw" frequency 2200 kHz and provide control of external keys on MIS traizistorah. Many of these drivers can drive four external output keys pas MOS transistors included bridge. The next stage in the development of UMZCH Class D was the creation of chips that integrate not only the driver but also the keys pas weekend MIS traizistorah. It is to such chips are MR7720, MR7731 and MR7781 firm MPS (Monolithic Power Systems). All are monophonic. About rated output says penultimate figure in the name: MR7720 - 20 W, MR7731 - 30 W, MR7781 - 80 watts. Peak output power of these chips twice. Consider the features and switching circuits each of them.
MR7720 IC is available in a SOIC8 (SMD) and PDIP8, which have 8 pins and the same pinout, or, as they say now, raspipovku. UMZCH this chip has a memorial 20W load resistance of 4 ohms and a supply voltage of 24 V. Frequency Response -20 Hz .... 20 kHz. It has an efficiency of 90% with non-linear distortion less than 0.1% for the whole frequency range and output power of 1 W (0.06 ... 0.07% to 1 kHz). Supply voltage 7.5 ... 24 V chip embedded in the bottom of the output key pas MOS transistors, which are connected in series on Nutrition (half-bridge).
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| Schematic diagram UMZCH Class D chip MR7720 |
Circuit of the chip that is very similar to the OS or UMZCH on chips that operate in the usual modes of classes A, B or AB. Integrated circuit U1 MR7720 has a differential input (pins 1 and 2), a positive (neivertiruyuschy) conclusion in this scheme is used as an input offset voltage, which sets the mode of the chip, and most importantly - the symmetry of the circuit. Bias voltage to neivertiruyuschem input (pin 1) should be equal to half the supply voltage, it is formed divider R3, R2. Capacitor C2 blocks the output AC voltage. It should be noted that the asymmetry of the circuit can cause an increase in nonlinear distortion and even overheating of one of the output switches and the output circuit of the system. The input signal is applied to the inverting input of circuits (terminal 2) via a capacitor C1 and a current limiting resistor R1. In position C1 firm - chip developer recommends using a ceramic capacitor types NPO, X7R, X5R or equivalent types. Voltage gain circuit is defined by the resistors R1 and NFB circuit R4 and can be calculated by the formula:
KU = R4/R1.
To increase the amplitude of the output pulses chip used on conventional two-stroke known transformerless amplifier circuit to increase efficiency with voltage boost capacitor C7, which is connected between the output (pin 7) and the input voltage boost circuit (pin 5). The capacitor C7 is selected in the range of 0.1 ... 1 uF. To protect the internal circuitry chip overload C7 connected in parallel with the zener diode D2 stabilization voltage of 6.2 V. For separation of the amplified signal and suppress high frequency components of the pulse in the load to the output (pin 7) is connected SFF consisting of choke L1 and capacitor C8. Capacitor C9 - isolating. Schottky diode D1 suppresses the induction currents and EMF emissions arising from the shift points in the L1 output switches when both keys are locked. PWM frequency transformation given feedback circuit R4, NW, and these denominations in the scheme it is 600 kHz. At a higher frequency increases power loss, and at least - non-linear distortion. C4 - NFB capacitor for high frequency. Capacitors Sat, C5 - decoupling filter feeding. To eliminate the passage of impulse noise on the supply lines capacitor C5 must be provided between the terminals 6 and 8 of the chip, and as close as possible to these conclusions. Simply work UMZCH this can be explained as follows. Input through Cl, R1 is supplied to the inverting input of the chip (output 2). This leads to a change in duty cycle duration and frequency of 600 kHz at the output circuit (pin 7) to change the law of the instantaneous value of the input signal and the appearance of the output signal amplified LF component, repeating the form input, which is through the LPF L1, C8 and separation capacitor C9 is supplied to the loudspeaker. Add to this can only be that the input and output signals in antiphase.
MR7731 chip comes in a TSSOP20F SMD, who has 20 pins and a metal pad on top for thermal contact with the heat sink. Rated power on the chip UMZCH MR7731 is 30 watts at 4 ohms load resistance and supply voltage 16 V. Frequency 20Hz .. "20 kHz. Efficiency of 90% at an output power of 5 watts. Harmonic distortion less than 0.1% for the whole frequency range with output power of 1W. Supply Voltage 7.5 - .24 B. chip 'built on four key output MOS transistors, which included the bridge. Feature mono UMZCH bridge is that they have two, usually equal to the output of amplifier channel keys that include half-bridge. Ie MR7731 chip contains two channels, similar in structure to the chip MR7720. Sol that these channels operate in antiphase, and the load (speaker) without dividing capacitors connected between the outputs of these channels, as a constant voltage at each output terminal is equal to half the supply voltage. For antiphase control switch channels normally used by the "master - slave» (Master - Slave), ie both amplifiers are included on the input signal sequentially
C1, C2 - blocking capacitors. R1. R2-voltage divider signals, L1, NE and L2, C4-LPF
For this integration, both channels must be an inverting amplifier. The signal on the second channel is output from the first through the divider Rl, R2 or the limiting resistor.
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| Schematic diagram UMZCH Class D chip MR7731 |
Typical circuit diagram UMZCH Class D chip MR7731 is shown in Fig , and pin assignment of this chip is shown bottom
Pin Number Designation Appointment
1 NC Not used
2 PIN1 Non-inverting input of channel 1. Used as an input offset voltage (reference voltage)
3 NIN1 Inverting input channel 1
4 AGND1 Housing analog part 1
5 NC Not used
6 EN1 Enable input channel 1. High - MS enabled. Low - off
7 NIN2 Inverting input of channel 2
8 PIN2 Non-inverting input of channel 2. Used as an input offset voltage (reference voltage)
9 AGND2 Housing analog part 2
10 EN2 Enable input for channel 2. High - MS enabled. Low - off
11 NC Not used
12 BS2 Input voltage boost circuit channel 2
13 VPP2 Input voltage of channel 2 (7.5 ... 24 V
14 SW2 Output channel 2
15 PGND2 Housing supply circuits 2
16 NC Not used
17 BS1 Input voltage boost circuit channel 1
18 VPP1 Power supply input channel 1 (7,5 ... 24)
19 SW1 Output channel 1
20 PGND1 Housing supply circuits 1
Sort out the details of the appointment on the chip UMZCH MR7731 scheme (Fig. ). Bias voltage to neiver-commuting inputs of both channels (pins 2 and 8), equal to half the supply voltage divider formed by R2, R5. Capacitor 09 bypasses these findings AC voltage, and capacitors C54 and C41 set the PWM frequency conversion of the 1st and 2nd channels respectively. These capacitors should be located as close to the terminals, near which they are drawn in the diagram. C53 - supply filter capacitor, and the C55 and C42-decoupling capacitors, which also should be placed as close as possible to the terminals, near which they are drawn. The input signal is applied to the inverting input of the channel 1 (terminal 3) via a coupling capacitor C35 and a current limiting resistor R16. The voltage gain of the channel is defined by 1 chip resistors chain DUS R14hR16, and channel 2 - Values R44 and R34. NFB HF channel 1 through capacitor C29. and Channel 2 - through C34. Capacitor C37 - this capacitor voltage boost channel 1, and C22 - capacitor voltage boost channel 2. They increase the efficiency of the amplifier. Parallel to these capacitors connected diodes D13 and D15 with a voltage of 6.2 V. The strong stabilizing output sound stands out in Fitch at the outputs of channels 1 (L4, C47) and 2 (L3, C43) and goes to the speaker. Fitch suppress high frequency components of the PWM pulse signal at the outputs of the chip and do not miss them in the load. Schottky diodes D6, D8 quenched induced currents and EMF emissions arising coils L3 and L4 switch points in the output switches when they are all locked. These coils should be rated at 2.6 A. Each channel has its own enable input EN1 (pin 6) and EN2 (pin 10).With a low voltage level on these findings the chip will be in the standby mode, when high - in operation. MR7781 chip comes in a SOIC24 SMD, which has 24 output and a metal pad on top for thermal contact with the heat sink. Memorial power on-chip mono UMZCH MR7781 80 watts at 4 ohms load resistance and supply voltage of 24 V. Frequency range 20 Hz to 20 kHz ..... 95% efficiency at an output power of 80 watts. Harmonic distortion less than 0.1% for the whole frequency range with output power of 1W. Supply Voltage 7.5 - .24 B. chip built on four key output MOS transistors, which included the bridge. MR7781 chip has two equal channel amplifier with differential inputs and output MIS keys that included half-bridge. This device contains two amplifier channels, each of which ends on the half-bridge MOSFETs. All this reminds MR7731, but unlike this chip, typically inclusion MR7781 scheme is used, which can be called a parallel-series connection of amplifier channels (see Fig ). In this scheme, the input signal directly to the inputs of both amplifier channels. Moreover, one channel it enters the non-inverting input, and in the other - an inverting. Therefore, the upper and lower speaker terminals are applied at the same amplitude but anti-phase voltage signals that can be seen from the graphs shown in the diagram ( Fig ). The ratio of resistances limiting resistor R1 and resistor divider circuits DUS R2, R3, R4, R5 determine the gain circuit. Divisors through R2, R3 and R4, R5 are defined as the bias voltage at the inputs and made negative feedback (NFB) at a constant voltage, which stabilize the mode amplification channels, ie these divisors set dc output channels equal to half the supply voltage, and by CCA to maintain them.
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| Simplified diagram UMZCH Bridged output (with parallel-serial control) |
C1 - decoupling capacitor,
R1 - limiting resistor,
R2, R3 and R4, R5 - divisors circuits 00C DC and AC voltage,
L1, C2 and L2, NW - LPF
MR7781 chip has a complex internal organization than the above circuit. This is indirectly confirmed by the number and pin assignments chip, as shown bottom .
Pin assignment chip MR7781
Pin Number Designation Appointment
1 DR1 Control output voltage of the low voltage channel 1
2 NC Not used (recommended to connect pin 1 or 3)
3 GND Corpus internal modulator
4 AI2 Non-inverting input of channel 2
5 BI2 Inverting input of channel 2 (input AUDIO HSE)
6 MO2 Internal PWM output + channel 2 (open-drain)
7 SHDN2 Enable input for channel 2. Active level - low
8 BS2 Input voltage boost circuit channel 2
9 GND Housing supply chain channel 2
10 SW2 Output channel 2
11 V + Input voltage PWM (7,5 ... 24)
12 M2 Input signal PWM driver stage of channel 2
13 DR2 Control output voltage of the low voltage channel 2
14 NC Not used
15 V + Input voltage of channel 2 (7.5 ... 24 V)
16 MO1 Internal PWM output channel 1 + (open-drain)
17 AI1 Inverting input of channel 1 (input DUS)
18 BI1 Non-inverting input of channel 1 (input AUDIO)
19 SHDN1 Enable input channel 1. Active low level +
20 BS1 Input voltage boost circuit channel 1
21 GND Housing supply circuits
22 SW1 Output channel 1
23 V + Power supply input channel 1 (7,5 ... 24)
24 M1 Input signal PWM driver stage channel 1
Typical circuit diagram UMZCH MR7781 on a chip is shown in Fig . The input signal is applied to the terminals 5 and 18 chip through limiting resistor R20 and capacitor C25. Resistors R3, R5, R7, R17, R19, R21, R12, R8 and capacitors Sat, C24, C9, C15 includes chain NFB DC and AC voltage. These chains set the gain chip and constant voltage equal to half the supply voltage, at the midpoint, ie outputs channels UMZCH bridge (pins 10 and 22 chips).Capacitor CIO in channel 1 and channel 2 S18a - Capacitors voltodobav matches that are needed to improve the efficiency of the amplifier.
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| Schematic diagram UMZCH Class D chip MR7781 |
LI, C2, L2, C2, C13, R2, C5, R18, C23 - it details the SFF, which is passed to the speaker audio signal and suppress pulse HF component of the PWM signal. SFF coils L1 and L2 must be rated at 5 A. The optimal frequency PWM conversion IC MR7781 is 400 kHz. It is determined by the capacitance of the capacitor C that is connected between the differential input pin of this chip (connected between the two terminals 5, 18, 4, 17). EMF emission quenching and induction currents in the coils L1 and L2 LPF moments in the switching output switches when they are all locked up, carried Schottky diodes D1 and D5.
Each channel has an enable input (active low). Pin 19 (SIIDN1) - this is the enable input channel 1 and pin 7 (SIIDN2) - enable input channel 2. These terminals are connected together. High level (inhibit signal) is generated using the parametric stabilizer R6, D3. With this level of power is turned off and is in MUTE, which is characteristic of low current consumption (
To obtain such a low power consumption mode MUTE, on-chip voltage regulators integrated low-voltage parts and circuit switching them. Control signals are output from this circuit chip via terminals 1 (DR1) and 13 (DR2), and then through the switching diodes D2 and D4 received at terminal 20, respectively (BS1) and 8 (BS2). Moreover, TT high level control signal output 13 (DR2) opens key on the bipolar transistor Q1. Through the transistor supply voltage supplied to the junction of resistors R1 and R11. Do chip MR7781 there are four interesting conclusions. This conclusion 16 (MOl), 24 (Ml), 6 (M02) and 12 (M2). MOl and M02 - it outputs PWM appropriate channels, a Ml and M2 - is key inputs output circuits. Conclusions MO and M with the same numbers are interconnected. In addition, outputs MO1 and MO2 are open drain. The pull-up resistor (external load) connected between these terminals and the voltage at the emitter of transistor Q1, - it is already known resistors R1 and Rl 1. C1 - supply filter capacitor, and capacitors NW, C12, C16, C8, C10, C14 and C18 - decoupling. To improve the outcome and reduce the interference is recommended to install them as close as possible to the corresponding terminals of the chip. To eliminate the characteristic UMZCH click for inclusion in the scheme established capacitors C7 and C9.
To ensure stability and repeatability circuit resistors R3, R5, R7, R17, R19, R21 and R12 should be 1% tolerance. The same shall be allowed, and a resistor R6.
THD indicated in the table, achievable and guaranteed only at a frequency of 1 kHz at the output power of 1W. With increasing frequency and power it rises. Dependence THD chip MR7720 from power (at a frequency of 1 kHz, 24 V supply voltage and load impedance 4 ohms) is shown in Fig, and the frequency of the signal (at 24 V supply voltage, load resistance of 4 ohms and power 19.6 W) -
In conclusion, I want to note that there are several varieties of PWM amplifiers. First, it is power "Class T" pulse width modulator which not only changes the duty cycle, but the frequency of the PWM output signal. Secondly, the so-called power "class N», information about which can be found in [3]. It also amplifier operating in key mode, but combined with the power supply unit.
